In the field of a Very Large Scale Integration (VLSI) design, a method of reducing power or improving power efficiency is to modify the voltage at which circuits operate. Due to power constraints or other considerations, an integrated circuit may include more than one voltage region. In accordance with certain designs, an integrated circuit's digital circuits may operate in one voltage domain and the integrated circuit's SRAM cells may operate in a different voltage domain. This division of a integrated circuit may occur due to the difference in operating conditions in a digital circuit versus an SRAM cell. In particular, digital circuits typically use a relatively high amount of power and have a high leakage rate. Under these conditions, it may be preferable to operate at a relatively low voltage. In contrast, SRAM cells typically are resistant to leakage and do not use a relatively high amount of power. Moreover, SRAM cells tend to fail at low voltages. Accordingly, under these conditions, it is may be preferable to operate at a higher voltage. Operating an integrated circuit at two or more voltages may require shifting between the two levels. In particular, it may be necessary for a signal to travel between voltage domains. However, a signal that is output from a circuit stage in one voltage domain may not be capable of driving a circuit stage in another voltage domain. Accordingly, transitioning between voltage domains sometimes requires passing the signal through a level shifter.
Typically, transitioning from a high voltage region to a low voltage region may be done without a level shifter. Specifically, a signal defined in a higher voltage region may be used to drive a gate or other circuit element that resides in a lower voltage region. In contrast, transitioning from a lower voltage region to a higher voltage region may be problematic. While it may be possible to assert a logical low value at an input, it may not be possible to assert a logical high value at a gate input. In particular, because the two voltage regions have a common ground, asserting a logic low, which corresponds or substantially corresponds to ground, results in a valid logic low. In contrast, asserting a logical high value from a lower voltage domain may not result in a voltage level that is within the voltage range needed in the higher voltage region.
The fundamental nature of logic gates contributes to the difficulty in transitioning from a lower voltage domain to a higher voltage domain. A typical logic gate, such as those implemented with Complementary Metal Oxide Semi-conductor (CMOS) processes, include a pull-up transistor that provides a path to the power supply rail and a pull-down transistor that provides a path to ground. A logic input value that results in a logical high value at the output is one in which the pull-up transistor is on and the pull-down transistor is off. Similarly, a logic value that results in a logical low at the output is one in which the pull-up transistor is off and the pull-down transistor is on. In order for the pull-up and pull-down transistors to be fully turned on and off, the input voltages should range between ground and the power supply rail. Intermediate voltages between these values often result in indeterminate values or erroneous voltages at the output. Accordingly, asserting a high logic value from a lower voltage domain to a logic gate in a higher voltage domain may result in errors in the logic gate output. In particular, the pull-up transistor may not be fully on, the pull-down transistor may not be fully off, or both. Accordingly, in transitioning from a low voltage domain to a high voltage domain, it may be necessary to add a circuit stage that is devoted to facilitating the transition.